Aryan Rauniyar

This research develops an AI-driven agent that automates digital chip design from human-created specifications. By integrating LLM’s with open-source EDA tools, the workflow generates Verilog code, verifies functionality, and produces optimized, digitally-verified circuit layouts. The project evaluates the feasibility of AI automation for the various tasks in the digital design process, operating autonomously without further human intervention. By automating the orchestration of existing workflows and creating push-button flows, this work aims to lower barriers to entry and enable broader access to semiconductor design and simulation.